System and method for hot swapping daughtercards in high availability computer systems

ABSTRACT

A system and method for hot swapping daughtercards in high availability computer systems. In one embodiment, a high availability computer system includes a peripheral bus. Daughtercards may be added to the computer system by inserting them into connectors associated with the peripheral bus. The daughtercards are configured to allow their insertion or removal from the computer system without interruption to system operations. When inserted into a computer system, a daughtercard may be powered up by power control circuitry on the daughtercard. When the daughtercard is powered up, it may then assert a configuration change signal. The computer system may then respond to the assertion of the configuration change signal by establishing software communications with the daughtercard. The configuration change signal may be driven to a storage unit located within a bus interface unit of the computer system. The state of the configuration change signal may be stored within a storage location of the storage unit. The storage location in which the state of a configuration change signal is stored for a given daughtercard is exclusive to that daughtercard. Thus, when a computer system detects the assertion of a configuration change signal, it may immediately make a determination as to which daughtercard asserted the signal.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to computer hardware, and more particularly, todaughtercards which may be added to a computer system with nointerruption to system operation.

2. Description of the Relevant Art

Computer systems that must operate for long periods of time withoutinterruption are sometimes referred to as high availability computersystems. Many high availability computer systems are also configured tocontinue operation despite some system component failures. Examples ofhigh availability computer systems may include industrial computers ornetwork file servers. In addition to the core elements of the computersystem, such as the processor and memory, many high availabilitycomputer systems also include additional hardware. Such hardware mayinclude network interface cards, process controllers, or cards providingother types of functionality. At times, it may be necessary to add orremove hardware (i.e. daughtercards) in a high availability computersystem. In many cases, the computer system must continue uninterruptedoperation despite this need. To this end, various standards have beendeveloped that allow hardware to be added or removed from a computersystem with no interruption to system operation (often referred to as“hot swapping”). One such standard is the CompactPCI® HotswapSpecification. This standard provides guidelines for designingdaughtercards which may be inserted into an operating computer systemwithout removing power or interrupting operations, as well as providingprocedures for initiating software communications with the daughtercard.The standard also provides guidelines for terminating softwarecommunications between the daughtercard and computer system, as well asremoving the daughtercard without interrupting operations.

A first requirement for any computer system to support hot swapping isto provide circuitry that enables the safe, orderly power-up of adaughtercard upon insertion, and orderly power-down upon preparation forremoval. Daughtercards configured for hot swapping typically includepower circuitry which isolates the functional circuitry (i.e. thatcircuitry which enables the daughtercard to perform its intendedfunction) from system power. After detection of system power, the powercircuitry may then allow power to be provided to the entiredaughtercard. Some power circuitry may also be configured to control thesequence at which certain devices on the daughtercard receive power.Similarly, prior to removing a daughtercard from an operating computersystem, power circuitry may remove power from the daughtercard in acontrolled fashion.

A second requirement to support hot swapping is the establishment ofsoftware communications between the host computer system and thedaughtercard. Software communications may be established manuallythrough the intervention of a user of the computer system, orautomatically. In the CompactPCI® Hotswap Specification, softwarecommunications may automatically be initiated following the power-upsequence by the assertion of a signal referred to as ENUM#. The ENUM#signal is bussed within a host computer system, as several daughtercardsmay share a common signal line. When a host computer system detects thata daughtercard has asserted the ENUM# signal, it may then begin pollingthe various daughtercards in order to determine which one asserted thesignal. Once the host computer system determines the source of theasserted ENUM# signal, it may then begin to initiate software contactwith the appropriate daughtercard.

The ENUM# signal may also be used to terminate software communicationsbetween a daughtercard and the host computer system. Daughtercards thatconform to the CompactPCI® Hotswap Specification include an ejectorhandle for removing the daughtercard from the computer system. Thisejector handle may activate a switch on the daughtercard, which may inturn assert the ENUM# signal. After determining the source of theasserted ENUM# signal, the host computer system may then begin theprocess of terminating software communications with the appropriatedaughtercard. Once software communications have been terminated, thedaughtercard may then begin its power-off sequence. When the power-offsequence is complete, the daughtercard may then be physically extractedfrom the computer system. Daughtercards which conform to the CompactPCI®Hotswap Specification include light-emitting diode (LED) which, whenilluminated, indicate that it is safe to extract the board from thecomputer system.

One problem that arises with systems such as that described abovepertains to the use of bussed signals. As previously stated, the ENUM#signal of the CompactPCI® Hotswap Specification is a bussed signal. Thisis illustrated in FIG. 1. Within the host computer system, the signalpath for the ENUM# signal is common to each daughtercard slot (i.e.connector). Thus, when the ENUM# signal is asserted, the host computersystem must first determine from which slot a daughtercard has assertedthe signal. This may require polling each of the daughtercards in orderto make this determination. Such polling may add complexity to systemsoftware routines for controlling the hotswap process. Furthermore, thecomputer may be required to use several bus cycles in order to determinewhich daughtercard asserted the signal. The use of the extra bus cyclesmay have an adverse affect on system performance.

SUMMARY OF THE INVENTION

The problems outlined above may in large part be solved by a system andmethod for hot swapping daughtercards in high availability computersystems in accordance with the present invention. In one embodiment, ahigh availability computer system includes a peripheral bus.Daughtercards may be added to the computer system by inserting them intoconnectors associated with the peripheral bus. The daughtercards areconfigured to allow their insertion or removal from the computer systemwithout interruption to system operations. When inserted into a computersystem, a daughtercard may be powered up by power control circuitry onthe daughtercard. When the daughtercard is powered up, it may thenassert a configuration change signal (such as the ENUM# signal describedabove). The computer system may then respond to the assertion of theconfiguration change signal by establishing software communications withthe daughtercard. The configuration change signal may be driven to astorage unit located within a bus interface unit of the computer system.The state of the configuration change signal may be stored within astorage location of the storage unit. The storage location in which thestate of a configuration change signal is stored for a givendaughtercard is exclusive to that daughtercard. Thus, when a computersystem detects the assertion of a configuration change signal, it mayimmediately make a determination as to which daughtercard asserted thesignal.

In one embodiment, removal of the daughtercard from the computer systemmay begin with the assertion of the configuration change signal. Theconfiguration change signal may be asserted in response to the actuationof a switch mounted to the daughtercard. The switch may be actuated byan ejector handle attached to the daughtercard. When the computer systemdetects the assertion of the configuration change signal, it may thenbegin the termination of software communications with the daughtercard.In some cases, software communications may terminate immediately, whilein others, a given task involving the daughtercard may be allowed tocomplete before terminating communications. When software communicationshave been terminated, power control circuitry may begin to remove powerfrom the daughtercard. Following the removal of power from thedaughtercard, a light-emitting diode (LED) on the daughtercard may thenbe illuminated. When illuminated, the LED indicates to a user of thecomputer system that it is safe to extract the daughtercard.

Thus, in various embodiments, the system and method for hot swappingdaughtercards in high availability computer systems may allow theaddition or removal of peripheral hardware with no interruption tosystem operation. The use of a separate storage location for storing thestate of a configuration change signal for each daughtercard may allowfor the simplification of system software. Instead of polling, the useof separate storage locations may allow the computer system toimmediately determine which daughtercard asserted the configurationchange signal. Thus, associated polling routines may be eliminated,thereby simplifying system software.

BRIEF DESCRIPTION OF THE DRAWINGS

Other objects and advantages of the invention will become apparent uponreading the following detailed description and upon reference to theaccompanying drawings in which:

FIG. 1 (prior art) is a block diagram of a computer system with a bussedENUM# signal;

FIG. 2 is a block diagram of one embodiment of a computer systemincluding separate configuration change signals for each daughtercard;

FIG. 3 is a block diagram of one embodiment of a daughtercard configuredfor hot swapping;

FIG. 4A is a schematic diagram illustrating the generation of the senseand presence signals used in one embodiment;

FIG. 4B is a schematic diagram illustrating the generation of theconfiguration change signal of one embodiment;

FIG. 5 is a flowchart illustrating a method of insertion of adaughtercard into an operating computer system for one embodiment; and

FIG. 6 is a flowchart of a method of extraction of a daughtercard froman operating computer system for one embodiment.

While the invention is susceptible to various modifications andalternative forms, specific embodiments thereof are shown by way ofexample in the drawings and will herein be described in detail. Itshould be understood, however, that the drawings and description theretoare not intended to limit the invention to the particular formdisclosed, but, on the contrary, the invention is to cover allmodifications, equivalents, and alternatives falling with the spirit andscope of the present invention as defined be the appended claims.

DETAILED DESCRIPTION OF THE INVENTION

Turning now to FIG. 2, a block diagram of one embodiment of a computersystem including separate configuration change signals for eachdaughtercard is shown. Computer system 1000 includes a centralprocessing unit 1001 and a bus interface unit 1002 which are coupled byCPU bus 1003. Bus interface unit 1002 is also coupled to a peripheralbus 1005. In the embodiment shown, peripheral bus 1005 is a peripheralcomponent interconnect (PCI) bus which conforms to the CompactPCI®Hotswap Specification. Other embodiments using other types of peripheralbuses, such as an Industry Standard Architecture (ISA) bus are possibleand contemplated. Connectors 1006 are associated with interface bus1005. Each connector 1006 allows a daughtercard 100 to be coupled tointerface bus 1005. Daughtercards 100 may be one of many different typesof peripheral hardware. Examples of common daughtercards include networkinterface cards, process controller cards, and video graphics cards.

Each daughtercard 100 is configured to assert a configuration changesignal. In the embodiment shown, configuration change signal is assertedas a logic low voltage. When asserted, the configuration change signalmay be driven to a storage unit 1004 via signal paths 1007. A separatesignal path 1007 for conveying a configuration change signal is providedfor each daughtercard 100. Storage unit 1004, which is located withinbus interface unit 1002, may be configured to store a state of theconfiguration change signal. Storage unit 1004 includes separate storagelocations each corresponding to a daughtercard 100. CPU 1001 isconfigured to execute instructions that allow the state stored in eachstorage location to be periodically read from storage unit 1004. A logiclow state detected in a given storage location may immediately allow CPU1001 to determine which daughtercard 100 asserted a configuration changesignal. If the daughtercard 100 asserting the configuration changesignal has been freshly inserted into computer system 1000, CPU 1001 mayexecute additional instructions which establish software communicationswith the daughtercard. After CPU 1001 has successfully establishedsoftware communications with daughtercard 100, computer system 1001 maythen utilize the additional resources which it provides, and theconfiguration change signal may then be de-asserted.

A daughtercard 100 already present within computer system 1000, withsoftware communications established, may also assert a configurationchange signal, indicating that the daughtercard is to be extracted. Whenthis occurs, CPU 1001 may execute instructions which cause a terminationof software communications between daughtercard 100 and computer system1000. Following the termination of software communications, daughtercard100 may begin a power-down sequence. Daughtercard 100 may be safelyextracted from computer system 1000 following completion of thepower-down sequence.

It is noted that while bus interface unit 1002 is directly coupled toCPU 1001 via CPU bus 1003 in the embodiment described above, businterface unit 1002 may be operatively coupled to CPU 1001 throughmultiple buses and/or interfaces in other embodiments.

FIG. 3 is a block diagram of one embodiment of a daughtercard configuredfor hot swapping. Daughtercard 100 includes an interface chip 102, apower controller 103, and daughtercard functional logic 104 mounted uponprinted circuit board (PCB) 101. Connector 105 is mounted to PCB 101,and is adapted to allow insertion of daughtercard 100 into computersystem 1000. Daughtercard 100 also includes an ejector handle 106 and aswitch 107.

Interface chip 102 provides a bridge between daughtercard functionallogic 104 and a peripheral bus within computer system 1000. Interfacechip 102 may transmit and receive bus signals associated with theperipheral bus from computer system 1000. Interface chip 102 may alsoreceive a clock signal from computer system 1000. Daughtercardfunctional logic 104 may send signals to and receive signals frominterface chip 102. In general, daughtercard functional logic 104 iscircuitry which performs the primary function of the daughtercard.Daughtercard 100 may be one of many different is types of daughtercards.

Power controller 103 provides power circuitry which allows for the safeand orderly power-up of daughtercard 100 following insertion into thecomputer system. When daughtercard 100 is inserted into computer system1000, power is received by power controller 103 through a power pin(denoted Vcc) of the computer system. A sense signal and a reset signalmay also be received by the daughtercard from the computer system. Whenpower controller 103 receives a sense signal from computer system 1000,it may begin powering up daughtercard 100. In the embodiment shown,power controller 103 may assert a Power On signal, which may then turnon power transistor 108. When activated, power transistor 108 allowssystem power to be provided to interface chip 102 and daughtercardfunctional logic 104. Other embodiments of various daughtercards may bepowered up in a different manner.

Power controller 103 is also configured to receive a reset signal fromcomputer system 1000. The reset signal may be asserted during thepower-up sequence for daughtercard 100. Power controller 103 may respondto receiving the reset signal by driving a bus reset signal to interfacechip 102. This may result in bus signals from interface chip 102 beingin a reset state once interface chip 102 is receiving power, which mayprevent daughtercard 100 from interacting with the peripheral bus.

When all circuitry of daughtercard 101 has successfully powered up,daughtercard 101 may then assert a board OK signal. In some embodiments,the board OK signal may be asserted once the daughtercard is powered up.In other embodiments, additional conditions (such as passing a built-inself-test) may be required for asserting the board OK signal. Computersystem 1000 may respond to the assertion of the board OK signal byde-asserting the reset signal.

Following the de-assertion of the reset signal, power controller 103 maythen respond by asserting the Configuration Change signal. When assertedby a freshly inserted daughtercard, the configuration change signalindicates to computer system 1000 that a new daughtercard is present andready for initiation of software communications. In response todetecting the asserted Configuration Change signal, computer system 1000may then begin establishing software communications with daughtercard100. When computer system 1000 has successfully established softwarecommunications with daughtercard 100, the Configuration Change signalmay be de-asserted.

Daughtercard 100 also includes an ejector handle 106 (some embodimentsmay have multiple ejector handles). In the embodiment shown, ejectorhandle 106 may be used to actuate switch 107. When actuated, switch 107provides and indication to daughtercard 100 that it is about to beextracted from the connector of computer system 1000 into which it iscoupled. Power controller 103 may respond to the actuation of switch 107by asserting the Configuration Change signal. In this case, computersystem 1000 may respond to the assertion of the Configuration Changesignal by terminating software communications with daughtercard 100. Inmany cases, computer system 1000 will allow daughtercard 100 to completeany pending operations before terminating software communications. Oncesoftware communications have been terminated, computer system 1000 mayassert the reset signal in order to prevent daughtercard 100 frominteracting with the peripheral bus. Computer system 1000 may alsode-assert the sense signal when software communications are terminated.Power controller 103 may then begin a power-down sequence, removingpower from interface chip 102 and daughtercard functional logic 104.With software communications terminated and the power-down sequencecompleted, power controller 103 may then illuminate light-emitting diode(LED) 108. When illuminated, LED 108 indicates to a user thatdaughtercard 100 may be safely extracted from the computer system.

Moving now to FIG. 4A, a schematic diagram illustrating the generationof the sense and presence signals used in one embodiment is shown. Thesense signal line in this embodiment is terminated by resistor 112B,which serves as a weak pull-down resistor, keeping the signal line at alogic-low voltage (near ground potential). When the daughtercard isinserted into the computer system, a strong pull-up resistor 112Aoverrides the weak pull-down resistor, and thus the sense signal isasserted as a logic-high voltage. The sense signal is then received bypower controller 103 on the daughtercard, and by the input to amplifier110A of the computer system. Amplifier 110A is configured to respond tothe logic-high input by driving the presence detect signal to alogic-high on its output. The presence detect signal may then be used bythe computer system to detect the presence of a freshly inserteddaughtercard. In order to de-assert the sense signal when a daughtercardis connected, power is provided to amplifier 110B through the signalline labeled Power On (amplifier 110B is normally off, with no powerapplied). Since the input of amplifier 110B is connected to ground, theoutput of the amplifier (when operating) will be at or near groundpotential. The sense signal may be deasserted in this manner when it isnecessary to remove the daughtercard from the computer system.

In FIG. 4B, a schematic diagram illustrating the generation of theconfiguration change signal of one embodiment is shown. When nodaughtercard is connected, the input signal trace to storage unit 1004is held at a logic-high voltage by pull-up resistor 114. When thedaughtercard is connected, the logic-high state will remain as long astransistor 115 is turned off. Transistor 115, arranged in an opencollector configuration, may be turned on by power controller 103. Theconfiguration change signal may be asserted when power controller 103turns on transistor 115. When transistor 115 is on, it may pull down thevoltage present on the signal line to a logic-low voltage, overridingthe pull-up resistor. Thus, the configuration change signal is assertedin a logic-low state in this embodiment. Storage unit 1004 may thenstore the logic-low state, thereby allowing the computer system todetect the assertion of the configuration change signal. A reading of alogic-low state from the storage unit may indicate to the computersystem that a daughtercard has been recently inserted into a connectorof the peripheral bus and is ready for establishment of softwarecommunications. A reading of a logic-low state may also indicate that adaughtercard is to be extracted from the computer system in cases wherethe daughtercard is present with software communications alreadyestablished.

Turning now to FIG. 5 a flowchart illustrating a method of insertion ofa daughtercard into an operating computer system for one embodiment isshown. The method begins with step 2001, as a daughtercard is insertedinto a computer system. Upon insertion of the daughtercard, sense andpresence detect signals are asserted. The presence detect signalprovides an indication to the computer system that a daughtercard hasbeen freshly inserted into the system. The sense signal provides anindication to the daughtercard that its presence has been acknowledgedby the computer system. After receiving the sense signal, a powercontroller on the daughtercard may then begin a power-up sequence. If,by step 2002, the daughtercard has successfully powered up, a board oksignal will be asserted by the daughtercard and the computer system willde-assert the reset signal, as in step 2004.

After verifying that the reset signal is de-asserted and the board oksignal is asserted (in step 2006), the daughtercard may then assert theconfiguration change signal in step 2008. The assertion of theconfiguration change signal is verified in step 2010. After theassertion of the configuration change signal, the computer system mayrespond by initializing software communications with the daughtercard.Establishing software communications may include such tasks as loadingdrivers into memory and allocating various system resources. Afterverifying that software communications have been fully established (step2014), normal daughtercard operations may be commenced. At this point,the computer system may employ those resources provided by thedaughtercard.

If, in step 2002, the daughtercard fails to fully complete its power-upsequence, the power controller on the daughtercard may respond byperforming a power-down sequence in step 2003. Similarly, if the boardok signal is not asserted by the daughtercard, or the reset signal isnot de-asserted by the computer system (step 2006), the power controllermay begin performing the power-down sequence of step 2003. Thepower-down sequence of step 2003 may also be performed if theconfiguration change signal is not asserted by the daughtercard (step2010).

If the initial attempt by the computer system to communicate with thedaughtercard is unsuccessful (step 2014), the computer system may makefurther attempts at establishing software communications (step 2005). Insome embodiments, subsequent attempts by the computer system tocommunicate with the daughtercard may occur automatically, while inother embodiments operator intervention may be required. If repeatedattempts at communicating with the daughtercard fail, the power-downsequence may then be performed (step 2003). When the power-down sequencehas completed, the daughtercard may then be physically extracted fromthe computer system (step 2007).

Moving now to FIG. 6, a flowchart of a method of extraction of adaughtercard from an operating computer system for one embodiment isshown. The extraction begins with the actuation of a switch on thedaughtercard, which may cause the configuration change signal to beasserted (step 3000). By asserting the configuration change signal, thedaughtercard provides an indication to the host computer system that itis to be extracted. The computer system may respond to the assertion ofthe configuration change signal by terminating software communicationswith the daughtercard (step 3001). In some cases, the computer systemmay allow for the completion of any pending operations involving thedaughtercard to complete before terminating communications. When thecomputer system has terminated communications with the daughtercard, itmay then de-assert the sense signal and assert the reset signal (step3002). Asserting the reset signal may prevent any further interactionsbetween the daughtercard and the peripheral bus. Next, the daughtercardbegins its power-own sequence, removing power from the daughtercard(step 3003), and illuminates an LED on the daughtercard. Whenilluminated, the LED indicates to a user of the computer system that thedaughtercard may be safely extracted from the computer system. Inresponse, the user may remove the daughtercard from the connector intowhich it is asserted (step 3004).

While the present invention has been described with reference toparticular embodiments, it will be understood that the embodiments areillustrative and that the invention scope is not so limited. Anyvariations, modifications, additions, and improvements to theembodiments described are possible. These variations, modifications,additions, and improvements may fall within the scope of the inventionsas detailed within the following claims.

1. A computer system comprising: a central processing unit (CPU); aperipheral bus; a bus interface unit coupled to accommodatecommunications between said CPU and said peripheral bus; a firstdaughtercard configured to assert a first configuration change signal inresponse to said first daughtercard being inserted within a firstconnector associated with said peripheral bus; a second daughtercardconfigured to assert a second configuration change signal in response tosaid second daughtercard being inserted within a second connectorassociated with said peripheral bus; and wherein said bus interface unitincludes a storage unit including a first storage location for storing astate of said first configuration change signal and a second storagelocation for storing a state of said second configuration change signal,and wherein the first storage location is coupled to receive the firstconfiguration change signal via a first signal line and the secondstorage location is coupled to receive the second configuration changesignal over a second signal line that is separate from the first signalline.
 2. The computer system as recited in claim 1, wherein said firstconfiguration change signal has a first state and a second state.
 3. Thecomputer system as recited in claim 2, wherein said first state is alogic-low voltage.
 4. The computer system as recited in claim 3, whereinsaid first state indicates that said first daughtercard has beenrecently inserted into said first connector.
 5. The computer system asrecited in claim 4, wherein said first state indicates that said firstdaughtercard is to be extracted from said first connector.
 6. Thecomputer system as recited in claim 1, wherein a state of said firstconfiguration change signal is read from said storage unit on a periodicbasis.
 7. The computer system as recited in claim 1, wherein saidperipheral bus is a peripheral component interconnect (PCI) bus.
 8. Thecomputer system as recited in claim 1, wherein said computer system isconfigured to drive a sense signal to said first daughtercard uponinsertion of said first daughtercard into said first connector.
 9. Thecomputer system as recited in claim 8, wherein said computer system isconfigured to receive a presence detect signal upon insertion of saidfirst daughtercard into said first connector.
 10. The computer system asrecited in claim 9, wherein said computer system is configured to drivea reset signal to said first daughtercard in response to receiving saidpresence detect signal.
 11. The computer system as recited in claim 10,wherein said first daughtercard includes power control circuitry,wherein said power control circuitry is configured to perform a power-upsequence on said first daughtercard in response to receiving said sensesignal from said computer system.
 12. The computer system as recited inclaim 11, wherein said first daughtercard is configured to drive a boardok signal to said computer system following completion of said power-upsequence.
 13. The computer system as recited in claim 12, wherein saidcomputer system is configured to de-assert said reset signal in responseto receiving said board ok signal from said first daughtercard.
 14. Thecomputer system as recited in claim 13, wherein said first daughtercardis configured to assert said first configuration signal in response tosaid computer system de-asserting said reset signal.
 15. The computersystem as recited in claim 14, wherein said computer system isconfigured to establish software communications between said computersystem and said first daughtercard in response to a detection of saidfirst configuration change signal.
 16. The computer system as recited inclaim 15, wherein said first configuration change signal is deassertedupon establishing software communications between said computer systemand said first daughtercard.
 17. The computer system as recited in claim1, wherein said first daughtercard includes at least one ejector handle.18. The computer system as recited in claim 17, wherein said firstdaughtercard includes a switch configured to be actuated by said ejectorhandle.
 19. The computer system as recited in claim 18, wherein saidfirst configuration change signal is asserted in response to anactuation of said switch.
 20. The computer system as recited in claim19, wherein said computer system is configured to terminate softwarecommunications between said computer system and said first daughtercardin response to an assertion of said first configuration change signal.21. The computer system as recited in claim 20, wherein said computersystem is configured to de-assert a sense signal upon termination ofsoftware communications between said computer system and said firstdaughtercard.
 22. The computer system as recited in claim 20, whereinsaid computer system is configured to drive a reset signal to said firstdaughtercard upon termination of software communications between saidcomputer system and said first daughtercard.
 23. The computer system asrecited in claim 22, wherein said first daughtercard includes alight-emitting diode (LED).
 24. The computer system as recited in claim23, wherein said LED is illuminated in response to upon termination ofsoftware communications between said computer system and said firstdaughtercard.
 25. The computer system as recited in claim 1, whereinsaid first daughtercard and said second daughtercard are configured forhot swapping.
 26. A method for hot-swapping daughtercards in anoperating computer system, the computer system comprising a centralprocessing unit (CPU), a peripheral bus, and a bus interface unitincluding a storage unit, said bus interface unit configured toaccommodate communications between said CPU and said peripheral bus, themethod comprising: inserting a first daughtercard into a first connectorassociated with said peripheral bus; inserting a second daughtercardinto a second connector associated with said peripheral bus; asserting afirst configuration change signal, said first configuration changesignal asserted by said first daughtercard; asserting a secondconfiguration change signal, said second configuration change signalasserted by said second daughtercard; storing a state of said firstconfiguration change signal in a first storage location of said storageunit, wherein the first configuration change signal is received by thefirst storage location via a first signal line; and storing a state ofsaid second configuration change signal in a second storage location ofsaid storage unit, wherein the second configuration change signal isreceived by the second storage location via a second signal line,wherein the second signal line is separate from the first signal line.27. The method as recited in claim 26, wherein said first configurationsignal has a first state and a second state.
 28. The method as recitedin claim 27, wherein said first state is a logic-low voltage.
 29. Themethod as recited in claim 28, wherein said first state indicates thatsaid first daughtercard has been recently inserted into said firstconnector.
 30. The method as recited in claim 28, wherein said firststate indicates that said first daughtercard is to be extracted fromsaid first connector.
 31. The method as recited in claim 26, wherein astate of said first configuration change signal is read from saidstorage unit on a periodic basis.
 32. The method as recited in claim 26,wherein said peripheral bus is a peripheral component interconnect (PCI)bus.
 33. The method as recited in claim 26, wherein said computer systemis configured to drive a sense signal to said first daughtercard uponinsertion of said first daughtercard into said first connector.
 34. Themethod as recited in claim 33, wherein said computer system isconfigured to receive a presence detect signal upon insertion of saidfirst daughtercard into said first connector.
 35. The method as recitedin claim 34, wherein said computer system is configured to drive a resetsignal to said first daughtercard in response to receiving said presencedetect signal.
 36. The method as recited in claim 35, wherein said firstdaughtercard includes power control circuitry, wherein said powercontrol circuitry is configured to perform a power-up sequence on saidfirst daughtercard in response to receiving said sense signal from saidcomputer system.
 37. The method as recited in claim 36, wherein saidfirst daughtercard is configured to drive a board ok signal to saidcomputer system following completion of said power-up sequence.
 38. Themethod as recited in claim 37, wherein said computer system isconfigured to de-assert said reset signal in response to receiving saidboard ok signal from said first daughtercard.
 39. The method as recitedin claim 38, wherein said first daughtercard is configured to assertsaid first configuration change signal in response to said computersystem de-asserting said reset signal.
 40. The method as recited inclaim 39, wherein said computer system is configured to establishsoftware communications between said computer system and said firstdaughtercard in response to a detection of said first configurationchange signal.
 41. The method as recited in claim 40, wherein said firstconfiguration change signal is de-asserted upon establishing softwarecommunications between said computer system and said first daughtercard.42. The method as recited in claim 26, wherein said first configurationchange signal is asserted in response to actuation of a switch mountedto said first daughtercard, wherein said switch is configured to beactuated by an ejector handle.
 43. The method as recited in claim 42,wherein said computer system is configured to terminate softwarecommunications between said computer system and said first daughtercardin response to an assertion of said first configuration change signal.44. The method as recited in claim 43, wherein said computer system isconfigured to de-assert a sense signal upon termination of softwarecommunications between said computer system and said first daughtercard.45. The method as recited in claim 44, wherein said computer system isconfigured to drive a reset signal to said first daughtercard inresponse to termination of software communications between said computersystem and said first daughtercard.
 46. The method as recited in claim44, wherein said first daughtercard is configured to illuminate alight-emitting diode (LED) in response to termination of softwarecommunications between said computer system and said first daughtercard.